Yenra : 3G : Multi-Chip Memory : Toshiba 1.8V package with burst mode capabilities for next-generation cellular phone applications

Next Generation Phones

As part of a continuing effort to create innovative memory technologies for cellular phone and consumer electronics manufacturers, TAEC today announced a 1.8 volt (V) multi-chip package (MCP) memory solution combining burst mode NOR Flash, burst mode Pseudo SRAM (PSRAM), low-power SRAM, NAND Flash or low power SDRAM to help reduce power consumption and extend battery life in next-generation cellular phones and other mobile computing products. In conjunction with the 1.8V MCP announcement, TAEC will introduce 1.8V burst mode PSRAM and 1.8V burst mode NOR Flash memory products developed Toshiba. These new low voltage memory devices are ideal for fulfilling the sophisticated memory and power specifications of feature-laden 2G and 3G cellular phones and other wireless communication devices.

Designs for next-generation cell phones have become exceedingly intricate, especially as more advanced features and applications, such as Web browsing, text messaging, interactive games, and digital camera functionality, are added to meet demand. Consequently, cell phone designers must carefully balance density, speed, cost and power considerations by using varying combinations of different memory chips to maximize the handset's overall performance.

In doing so, product developers often utilize NOR flash memory for code storage, and low-power SRAM or fast, cost-effective PSRAM for working memory. Manufacturers are using NAND flash in addition to, or in place of, NOR flash because of its significantly faster program and erase speeds which are necessary for fast data storage, especially in camera phones. In addition, as cell phone form factors continue to shrink in size, reducing power consumption to maximize battery life is a significant priority.

Toshiba's new 1.8V MCP memory stacks provide varying combinations of low-power memory in densities targeted to meet these demanding performance and voltage needs. Typical configurations demanded include PSRAM+NOR, PSRAM+NOR+NAND, PSRAM+NOR+NAND+SDRAM, or NAND+SDRAM. These MCP configurations are also flexible and fully customizable in stacks of two to nine layers to accommodate the performance requirements of the customer and to create the most effective solution possible.

"The introduction of these new MCP solutions further demonstrates Toshiba's commitment to providing OEMs with the most advanced, low-voltage memory subsystems for next-generation cellular phones," said Scott Beekman, business development manager for communication memory products at TAEC. "Cell phone manufacturers will also benefit from the addition of burst mode NOR and PSRAM to Toshiba's memory line-up, which deliver significantly faster data transfer rates and better overall performance than previous products."

Since 3G cellular phones are driven by the delivery of multimedia content, the speed of data transfer rates is of critical importance in the design process. Toshiba's new 1.8V NOR and PSRAM memories both offer burst mode capabilities, which enable the phone to read and write larger files at increased speeds, resulting in improved performance over advanced cellular networks.

One of the new devices that enable Toshiba to offer a complete 1.8V MCP is its new 128 megabit1 (Mb) burst mode PSRAM, designated TC51YNM716AXBN, which features high density, high speed and low-power. The new device offers a standby mode that requires only 200 microamps of current, along with a synchronous burst function with selectable burst length, from 1 to 64 words. Organized 8Mwords x 16-bits, with an 8-word page operation, the new device also features SRAM-like read-write timing in asynchronous mode controlled by the chip enable, output enable and write enable inputs. This PSRAM will be offered as a discrete component in a 12 x 9 PFBGA package, or can be combined with other memory die in an MCP.

The Toshiba TY58FVM7T2B/7B2B Page/Burst NOR Flash is organized 8Mwords x 16-bits, and features page/burst mode, and top or bottom boot block. For fast operation, the new NOR device supports simultaneous Read/Write operations, auto power down, and 10 nanosecond (ns) burst access cycle time. Available modes include auto block/chip erase, auto program, program/erase, suspend/resume and block protect. The device operates on a 1.65V to 1.95V power supply, and will initially be offered only in chip scale packages as part of Toshiba MCPs.

A wide selection of NOR flash, NAND flash, low-power SRAM, low-power SDRAM, and PSRAM memory chips is available for the stacked MCP configurations. Details on Toshiba's new 1.8V burst NOR and 1.8V burst PSRAM are shown in the table below. Specific combinations of memory chips will be reviewed by Toshiba for technical feasibility.