IPTV Reference Design - Yenra

Robust multi-format video/audio decoding, networking, hardware accelerated security, and software ecosystem

IPTV

WISchip's DeCypher 8100 IPTV reference design is the first in a series of reference designs the company plans to produce based upon its revolutionary DeCypher 8100 real-time streaming media decoder SoC. Combining advanced, network-ready video and audio decoding, hardware accelerated security, and a robust software ecosystem, the Micronas/WISchip IPTV reference design offers makers of consumer electronics products a turnkey solution they can use to reduce the cost and speed time-to-market for the next generation of IPTV set-top boxes, digital TVs, and HDTVs.

The highly integrated reference design decodes high- and standard-definition video formats including H.264 (AVC/MPEG-4 part 10), VC-1/ WMV9 and MPEG-4/-2/-1, and also supports audio decoding for Dolby Digital, WMA, WMA Pro, AAC and MPEG audio layers I, II and III (MP3) audio. Security and digital rights management for current and emerging standards are provided through a dedicated security processor and hardware acceleration for cryptographic functions. The reference design will be supported by a broad array of operating systems, middleware, and application software.

"As the IPTV market ramps up, integration is the name of the game for producing new products quickly and cost effectively. This new reference design builds upon our unique DeCypher 8100 SoC to make it easier than ever for manufacturers to get to market fast with highly differentiable product offerings," said Jim Nguyen of Micronas/WISchip. "With IP networking and advanced video compression rapidly becoming the backbone for next-generation broadband video and interactive services from Baby Bells, MSOs and others, our IPTV reference design will deliver virtually everything needed to ensure consumer electronics products are ready for it."

Infonetics Research predicts that worldwide IPTV revenue will hit $44 billion by 2009 with 53 million subscribers. $304 million was spent on IPTV infrastructure last year and that figure is expected to grow to $4.5 billion in 2009.

A flexible, robust software ecosystem will support both Linux and Windows CE operating systems, various middleware stacks, wired and wireless network protocols, application-level solutions, as well as a wide variety of DRM and access control schemes. The Micronas/WISchip platform is also DLNA compliant, and supports Microsoft UPnP and Apple Rendezvous for zero-configuration network support.

The Micronas/WISchip DeCypher 8100 IPTV reference design offers comprehensive connectivity, from wired and wireless networking to analog and digital video and audio outputs, as well as other I/O capabilities. Network I/O includes two USB 2.0 ports, an RJ-45 10/100 wired Ethernet port and 802.11a/b+g/n wireless Ethernet via the onboard mini-PCI. The onboard Micronas ATSC digital TV demodulator DRX 3942H supports free-to-air digital broadcast reception. HDMI (YCbCr or RGB output), component video, composite video, S-video, SCART and channel 3/4 RF video outputs are provided, as well as 2-channel stereo and 5.1-channel analog audio, optical and coaxial S/PDIF digital audio and digital audio to HDMI. Other I/O includes an ATAPI/IDE controller/connector, IR remote control input/receiver, front panel connector, Mini-PCI connector and flash media connector supporting all popular formats, as well as JTAG and serial interfaces for development and debugging.