To keep Europe at the forefront of semiconductor technology, the European Commission will seed-fund an Integrated Project called NANOCMOS. The project aims to pioneer the necessary changes in materials, processes, device architectures, and interconnections to keep pushing the limits of semiconductor performance and density.
Participants in the project will be charged with demonstrating the feasibility of 45-nm CMOS logic technology in 2005 while simultaneously starting research activities for the next-generation 32- and 22-nm technology nodes. Today these smaller nodes are considered at the limits of present technologies. The results of NANOCMOS project are expected to open the way to entirely new applications for the Information Society.
The partners in the project are: Europe's three largest semiconductor companies -- Infineon, Philips and STMicroelectronics; the two largest European Technological Research Institutes -- CEA Leti (France) and IMEC (Belgium); three research laboratories coordinated by the FhG (Germany); eight research laboratories coordinated by the CNRS (France); one research laboratory from the Technical University of Chemnitz (Germany); three companies - Ion Beam Services (France), ISILTEC (Germany) and Magwel (Belgium); and ACIES Europe (France), which will undertake some management aspects of the project. Additional partners could be incorporated into the Consortium in the future.
Guillermo Bomchil, leader of the NANO CMOS Project, comments: "Because of its ambitious objectives and committed resources that are mobilized for a common goal, NANOCMOS represents a unique opportunity for Europe to become the leading center for Nanoelectronics, while supporting academic research and helping its indigenous industrial players to hone their competitive edge."
The first phase of the NANO CMOS project is expected to last 27 months and mobilizes a large research potential. In addition to the euro 24M support from the European Commission, the partners will also invest advanced research resources to achieve the objectives of the project.
The partners will submit a proposal for the second phase of the NANOCMOS project, starting in 2006, to the European Commission. This phase will aim to demonstrate the feasibility of the 32 and 22-nm nodes. Additionally, the consortium will make a proposal to the MEDEA+ organization to start, in 2006, on the integration and validation of the 45-nm technology node in an industrial 300-mm wafer manufacturing facility, currently expected to be the Crolles2 facility, which is jointly shared by Motorola, Philips, and STMicroelectronics. These two upcoming project proposals have been integrated in the whole NANOCMOS strategy and discussed with European Commission and MEDEA+ officials.
In addition to NANOCMOS, the European Commission has agreed to sponsor the SINANO 'Network of Excellence'. This 'Network' is highly complementary to NANOCMOS and gathers most of the European Public Research Laboratories working in the field of novel devices. Together, NANOCMOS and SINANO represent a powerful ensemble of industry and academia that will pave the way for rapid adoption by integrated circuit (IC) manufacturers of promising results produced by the academic partners.
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