64-Layer 3D NAND Explained: Flash Memory and UFS - Yenra

Understand NAND layers, bits per cell, controllers, and UFS, then read a storage specification with the right questions in mind.

A conceptual layered flash-memory block with vertical channels beside a plain embedded package.
Conceptual illustration, not to scale: a layered memory structure and a finished package represent different levels of a storage device.

“64-layer” describes a generation of three-dimensional NAND memory. To understand a finished storage device, read that term alongside its controller, interface, capacity, and workload specifications. Each describes a different part of how the device stores and moves data.

What the layers describe

In 3D NAND, memory cells occupy multiple levels within a semiconductor structure. Increasing the vertical arrangement can place more storage into a given footprint. Kioxia's BiCS FLASH technology explanation shows how a layered structure and vertical channels form cells. The illustration above is a conceptual model, with no claim to show exactly 64 layers or a manufacturing cross-section.

Keep three scales separate: the cell structure inside a die, the number of dies assembled in a package, and the complete storage product containing packages and control electronics. A layer count belongs to the first of these. Package dimensions and drive capacity describe other levels.

Bits per cell are a separate choice

Common terminology uses SLC for one bit per cell, MLC for two, TLC for three, and QLC for four. Those bit counts correspond to 2, 4, 8, and 16 distinguishable states. Kioxia's explanation of multi-level cell technology describes the threshold-voltage distributions used to encode them. A specification can therefore describe both a layer count and a bits-per-cell arrangement.

Evaluate a finished device using its documented endurance, retention conditions, performance, and power requirements. A cell label or a larger layer number leaves too much of the product unspecified to establish which device best fits a workload.

Put each specification in the right category

On a narrow screen, focus the table region and scroll horizontally to read every column.

Storage terms describe different layers of a product
TermWhat it describesQuestion to ask
3D NAND / 64 layersThe arrangement of memory cells within a dieWhich generation and finished part?
TLC / QLCBits encoded per cellWhat endurance and performance does this product specify?
ControllerElectronics and firmware managing the memoryWhich error handling, mapping, and lifecycle functions are supported?
UFSA standardized managed-flash interface/device familyWhich version, package, and host support apply?
NVMe over PCIeA storage command interface and its transport in a client SSDDoes this computer support the drive and boot path?
M.2 2280A module format with nominal 22 x 80 mm dimensionsWhich interface, keying, mounting, and clearance are supported?

For a concrete contrast, the Toshiba XG5-P combines 3D NAND with a client SSD controller and a PCIe/NVMe connection on an M.2 module. The embedded UFS devices below package NAND and a controller for a different host interface.

A dated example: Toshiba's 2017 UFS devices

On November 29, 2017, Toshiba announced sampling of embedded UFS devices using 64-layer BiCS FLASH. Its original release specified a 32–256 GB lineup, with the 64 GB device sampling first. The controller handled error correction, wear leveling, address translation, and bad-block management.

The devices used UFS 2.1. The release gave the 64 GB model sequential read and write figures of 900 MB/s and 180 MB/s, while separately describing a theoretical interface rate of 5.8 Gbit/s per lane across two lanes. These quantities measure different things: signaling capacity and the device's stated transfer performance.

Keep these numbers labeled as a 2017 example. For a modern device, check its own UFS version and specifications. The Linux kernel's UFS documentation explains the host-side protocol stack and its relationship to JEDEC's storage specification.

Read a storage specification in five passes

  1. Identify the finished part. Record the exact model and capacity. A family headline can cover variants with different performance.
  2. Check the host connection. Confirm protocol, supported interface version, and physical integration. A matching memory technology says little about host compatibility.
  3. Read each performance row with its conditions. Note read versus write, sequential versus random, transfer size, concurrency, cache state, and temperature. Ask which workload the number helps predict.
  4. Budget usable space and ongoing writes. Allow for the operating system, applications, working files, updates, and the device's documented spare-space requirements. Read endurance ratings and their test conditions when available.
  5. Compare support and recovery. Find the device maker's update policy, service procedure, and backup method. Evaluate these alongside speed.

When a seller lists only “3D NAND” or “UFS,” mark the missing model and test conditions as unknown. Avoid filling the gaps with figures from a similarly named product.

What this means for owners and system builders

An embedded UFS package is a board component. Check the finished device's service documentation before assuming storage can be replaced. A removable card slot, where present, is a separate feature with its own supported formats and intended uses.

For a phone or tablet purchase, begin with capacity for the apps and media you actually retain, then investigate sustained performance and support for the complete device. For a circuit-board design, use the exact part's electrical, package, layout, and qualification documentation; a general explanation cannot establish design compatibility.

For a computer upgrade, use the SSD compatibility workflow. For storage shared by many computers, move up another level and assess the file system, network, and concurrent workload. The NAND is one component of that larger system.

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