PRINTED TRANSISTOR EVIDENCE RECORD
Purpose: connect device, stack and process results to a specific circuit requirement.
Application and reason to use this approach:
Source/date, device structure and substrate:
For each layer: material, deposition/patterning, atmosphere and process limits:
Which layers are printed? Which are coated, evaporated or assembled?
Electrical evidence: biases, geometry, on/off ratio, threshold/hysteresis, mobility
extraction, load and speed:
Sample count/distribution, sheet position, batch and measurement uncertainty:
Bias/environment stability, encapsulation and bend-test conditions:
Illustrative model: all 1,000 devices required, independent failures. 0.999^1000 = 36.8%
all-good circuits; 0.9999^1000 = 90.5%. Fictional model excludes correlated defects, repair
and redundancy.
Circuit demonstration, pilot/process control, actual yield and missing tests:
Decision and the specific application limits supported by the evidence:

Yenra | Updated September 10, 2026
Article and explanation: https://yenra.com/printed-plastic-transistors/

Source references (use exact equipment/material documents for actual work):
https://www.iap.fraunhofer.de/en/research/functional_polymer_systems/polymers_and_electronics/polymers_for_OFETs.html
https://www.iap.fraunhofer.de/en/research/functional-polymer-systems/ink-formulation.html
https://www.vttresearch.com/en/ourservices/printocent-pilot-factory