SEMICONDUCTOR PARAMETRIC TESTING: BUILD A TRUSTWORTHY MEASUREMENT PLAN
Editable planning/verification record — Yenra
Updated: October 2, 2026
Article: https://yenra.com/parametric-testing/

Purpose: Specify a DC test with traceable bias, range, compliance, settling and calibration conditions, and recognize when RF methods need a separate setup.
Intended reader: Device and process engineers planning wafer-level electrical characterization.

HOW TO USE
Save a working copy. Enter the actual specification, units, assumptions and evidence references in each field. Preserve original observations and record changes. Have the responsible reviewer resolve missing or conflicting requirements before release. Examples below are fictional teaching inputs, not process settings or acceptance standards.

RECORD
1. Wafer/lot/site/device identity, structure and required parameter:
   ____________________________________________________________

2. Approved bias sequence, polarity and limits in V/A; temperature in deg C:
   ____________________________________________________________

3. Instrument/module, calibration status, firmware and test revision:
   ____________________________________________________________

4. Force/sense connections, probes, switching, shielding and guarding diagram reference:
   ____________________________________________________________

5. Ranges, integration time, source delay, settling evidence and compliance setting:
   ____________________________________________________________

6. Actual sourced/measured values, status flags and raw record location:
   ____________________________________________________________

7. Control/blank results, leakage/drift investigation and uncertainty:
   ____________________________________________________________

8. Pass/fail decision rule, exceptions, review and requalification triggers:
   ____________________________________________________________


WORKED EXAMPLE AND LIMITS
Fictional leakage observation under one approved fixed bias: current is 32 pA after 0.1 s, 14 pA after 1 s and 12 pA after 5 s. This indicates time dependence in the combined DUT/setup response. It does not establish 5 s as sufficient settling for every device or justify subtracting a fixture blank without a validated correction. Repeat and investigate using the applicable test procedure.

REVIEW
Prepared by / date: ____________________
Reviewed by / date: ____________________
Open issues, responsible owner, due date: ____________________
Approved next action and evidence: ____________________

SOURCE CONTEXT
These primary references support the linked article. Use exact applicable product, contract, and document versions for operational work.
Keysight's parametric-test handbook
https://www.keysight.com/us/en/assets/7018-05884/application-notes/5992-2508.pdf
Keysight E5270B quick reference
https://www.keysight.com/us/en/assets/9018-07953/quick-start-guides/9018-07953.pdf
Keithley's Low Level Measurements Handbook
https://www.tek.com/en/documents/product-article/keithley-low-level-measurements-handbook---7th-edition
Keithley switching guide
https://www.tek.com/en/documents/fact-sheet/e-handbook-guide-switch-considerations-signal-type

Return to the guide: https://yenra.com/parametric-testing/