DIGITAL ISOLATION — REQUIREMENTS AND EVIDENCE
Use one record per barrier. Have the responsible engineer establish insulation requirements
from the applicable product standard; this worksheet supplies no safety rating or clearance
value.
Domain A ground / supply / function:
Domain B ground / supply / function:
All conductive paths reviewed (power, shield, debugger, USB, hardware):
Required insulation function / standard and edition / reviewer:
Working voltage (RMS/DC and/or repetitive peak; include waveform):
Withstand test voltage / duration / standard:
Surge requirement / waveform:
Creepage / clearance / material / pollution / altitude requirements:
CMTI minimum (kV/us) / actual common-mode conditions:
Part / exact suffix / package / certificate references:
Channel counts and directions / local supply ranges / thresholds:
Default outputs during missing power, floating input and reset:
Isolated power arrangement / startup / current budget:
Timing mode / launch edge / capture edge / maximum delays / margin:
Illustrative only: 10 MHz half-cycle = 50 ns; 10 + 18 + 10 + 7 = 45 ns; margin 5 ns. At 20
MHz, 25 - 45 = -20 ns. Replace values with guaranteed limits and uncertainty.
Validation evidence: hardware / firmware / supply / temperature / patterns:
Startup and missing-side power tests:
Qualified compliance tests required / owner / results:
Each specification: value / units / min-typ-max / source section / open issue.

Yenra | Updated September 10, 2026
Article and explanation: https://yenra.com/digital-voltage-isolation/

Source references (use exact equipment/material documents for actual work):
https://www.ti.com/lit/pdf/slla284
https://www.ti.com/lit/ab/slla426/slla426.pdf
https://www.ti.com/product/ISO6463